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Nexperia Ultra-Low Power Open Drain Buffer 5-Pin TSSOP 0.8-3.6V 10ns Propagation Delay 74AUP1G07GW,125

Category Logic ICs Brand Nexperia Condition New

Specifications

Country of Origin Malaysia
Brand Nexperia
Height 1mm
Length 2.25mm
Model 74AUP1G07GW,125
Mount Type Surface
Output type Open Drain
Series 74AUP1G07
Input Type Single Ended
Maximum Operating Temperature 125°C
Package Type TSSOP
Minimum Operating Temperature -40°C
Standards/Approvals RoHS
Pin Count 5
Maximum Supply Voltage 3.6V
Logic Family AUP
Logic Function Buffer
Minimum Supply Voltage 800mV
Maximum Propagation Delay Time @ CL 10ns
Supply Current 50mA
Maximum Low Level Output Current 4mA
Wide supply voltage range 0.8 to 3.6V

Key Features

  • Operates with a minimum supply voltage of 0.8V and maximum of 3.6V.
  • Provides a maximum propagation delay time of 10 nanoseconds at CL.
  • Supports a maximum low-level output current of 4mA.
  • Compact surface-mounted 5-pin TSSOP package with 1mm height and 2.25mm length.
  • Wide operating temperature range from minus 40°C to 125°C suitable for industrial applications.
  • Built using the 74AUP logic family for ultra-low power consumption and high noise immunity.
  • Designed without Schmitt-trigger input and single-ended input type.
  • RoHS compliant and produced in Malaysia.

Product Description

Nexperia 74AUP1G07GW,125 is an advanced ultra-low power open drain buffer from the 74AUP1G07 family. This 5-pin TSSOP surface mount device operates over a wide supply voltage range of 0.8V to 3.6V, making it ideal for use in low power and mixed voltage applications from 1.8V to 3.3V circuits.

It provides a maximum propagation delay time of 10 nanoseconds at the specified load capacitance ensuring fast signal buffering with minimal latency. The device supports a maximum low-level output current of 4mA and a supply current of 50mA, making it energy efficient while maintaining required output drive characteristics.

The buffer uses a single-ended input type and does not incorporate Schmitt-trigger inputs, designed for noise immunity through the AUP logic family standard. Its compact 5-pin TSSOP package measures 1mm in height and 2.25mm in length, suitable for space-constrained applications.

The device is rated for an operating temperature range from -40°C to 125°C, enabling reliable performance in varying industrial and commercial environments. It complies with RoHS standards and is manufactured in Malaysia, ensuring environmental and quality standards adherence.

Wide supply voltage range from 0.8V to 3.6V. Maximum propagation delay time of 10 nanoseconds. Maximum low-level output current of 4mA. Compact 5-pin TSSOP surface mount package. Operating temperature range from -40°C to 125°C.

Single-ended input logic without Schmitt trigger. Low supply current of 50mA. RoHS compliant and made in Malaysia. This open drain buffer is suitable for electronic, semiconductor, industrial control, and mixed voltage applications in low power logic signal buffering.

Explore more semiconductor Logic ICs and buffers on EnvMart for industrial and manufacturing usage.

Nexperia Ultra-Low Power Open Drain Buffer 5-Pin TSSOP 0.8-3.6V 10ns Propagation Delay 74AUP1G07GW,125
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Frequently Asked Questions

The maximum supply voltage for this model is 3.6V.

It provides a maximum propagation delay time of 10 nanoseconds at the specified load capacitance.

The operating temperature range is from -40°C to 125°C, making it suitable for various industrial applications.

This buffer features an open drain output type.

The compact TSSOP package measures 1mm in height and 2.25mm in length.

It supports a maximum low-level output current of 4mA.

The supply current for this unit is 50mA.

This model uses a single-ended input type without Schmitt-trigger inputs.

Yes, it is RoHS compliant, ensuring adherence to environmental standards.

This buffer is built using the AUP logic family, designed for ultra-low power consumption.

The buffer is manufactured in Malaysia.

This open drain buffer is suitable for electronic, semiconductor, industrial control, and mixed voltage applications in low power logic signal buffering.

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