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| Country of Origin | India |
|---|---|
| Brand | Nexperia |
| Height | 850μm |
| Length | 2.1mm |
| Model | 74AUP2G08DC,125 |
| Mount Type | Surface |
| Output type | ECL |
| Series | 74AUP2G |
| Input Type | CMOS |
| Maximum Operating Temperature | 125°C |
| Package Type | VSSOP |
| Minimum Operating Temperature | -40°C |
| Pin Count | 8 |
| Number of Elements | 2 |
| Maximum Supply Voltage | 3.6V |
| Logic Family | AUP |
| Logic Function | AND |
| Minimum Supply Voltage | 800mV |
| Maximum High Level Output Current | -4mA |
| Maximum Propagation Delay Time @ CL | 8.3ns |
| Maximum Low Level Output Current | 4mA |
| Number of Inputs per Gate | 2 |
Nexperia 74AUP2G08DC,125 is a low-power dual 2-input AND Schmitt trigger input logic gate housed in an 8-pin VSSOP surface mount package. It supports efficient digital logic operations over a supply voltage range from 0.8 V to 3.6 V, making it well-suited for low voltage and battery-operated applications.
The device integrates Schmitt-trigger inputs on all gates, which enhances noise immunity and tolerance to slower input signal transitions. This feature reduces the possibility of false triggering due to input noise or slow input rise and fall times. It ensures stable and reliable operation across the entire supply voltage range.
Power consumption is minimized, with a low maximum static ICC of 0.9 μA. The device includes IOFF circuitry to disable output when partially powered down, preventing damaging backflow currents - a critical feature for power-sensitive and energy-efficient industrial, automotive, and consumer electronics applications.
The maximum propagation delay time is 8.3 nanoseconds at the specified load capacitance, providing fast switching suitable for high-speed digital circuits. It operates reliably within a wide temperature range from -40°C to 125°C, supporting use in harsh or industrial environments.
The package type is an 8-pin VSSOP surface mount, which supports compact PCB layouts and automated assembly processes. This logic gate belongs to the 74AUP2G series and is designed for CMOS input types with ECL output. It features maximum output current capability of ±4 mA, enabling drive of subsequent logic stages or small loads.
Dual 2-input AND logic gate with Schmitt trigger inputs. Wide supply voltage range of 0.8 V to 3.6 V. High noise immunity with low noise overshoot and undershoot less than 10% of VCC. Extremely low static power consumption (max ICC 0.9 μA).
IOFF circuitry supports partial power-down applications. Fast propagation delay of 8.3 ns at typical load capacitance. Robust operation from -40°C to 125°C temperature range. Compact 8-pin VSSOP surface mount package. Suitable for industrial, automotive, consumer electronics, and low-power digital systems.
Explore a wide range of semiconductor Logic Gates including AND, OR, NAND, NOR, and Schmitt trigger inputs at EnvMart, optimized for your electronic design needs.
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